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https://github.com/preble/libpinproc
synced 2026-02-24 18:25:23 +01:00
Keep track of chip_id and use it when retrieving switch states.
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@@ -164,7 +164,10 @@ PRResult PRDevice::Reset(uint32_t resetFlags)
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int PRDevice::GetEvents(PREvent *events, int maxEvents)
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int PRDevice::GetEvents(PREvent *events, int maxEvents)
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{
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{
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if (SortReturningData() != kPRSuccess)
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if (SortReturningData() != kPRSuccess)
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return -1;
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{
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PRSetLastErrorText("GetEvents ERROR: Error in CollectReadData");
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return -1;
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}
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// The unrequestedDataQueue only has unrequested switch event data. Pop
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// The unrequestedDataQueue only has unrequested switch event data. Pop
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// events out 1 at a time, interpret them, and populate the outgoing list with them.
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// events out 1 at a time, interpret them, and populate the outgoing list with them.
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@@ -796,16 +799,28 @@ PRResult PRDevice::SwitchGetStates( PREventType * switchStates, uint16_t numSwit
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// situations; so the inefficiencies are acceptable.
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// situations; so the inefficiencies are acceptable.
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for (i = 0; i < numSwitches / 32; i++)
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for (i = 0; i < numSwitches / 32; i++)
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{
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{
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rc = RequestData(P_ROC_BUS_SWITCH_CTRL_SELECT,
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P_ROC_SWITCH_CTRL_STATE_BASE_ADDR + i, 1);
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if (combinedVersionRevision < P_ROC_VER_REV_FIXED_SWITCH_STATE_READS) {
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if (chip_id == P_ROC_CHIP_ID)
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{
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rc = RequestData(P_ROC_BUS_SWITCH_CTRL_SELECT,
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rc = RequestData(P_ROC_BUS_SWITCH_CTRL_SELECT,
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P_ROC_SWITCH_CTRL_OLD_DEBOUNCE_BASE_ADDR + i, 1);
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P_ROC_SWITCH_CTRL_STATE_BASE_ADDR + i, 1);
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if (combinedVersionRevision < P_ROC_VER_REV_FIXED_SWITCH_STATE_READS) {
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rc = RequestData(P_ROC_BUS_SWITCH_CTRL_SELECT,
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P_ROC_SWITCH_CTRL_OLD_DEBOUNCE_BASE_ADDR + i, 1);
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}
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else {
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rc = RequestData(P_ROC_BUS_SWITCH_CTRL_SELECT,
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P_ROC_SWITCH_CTRL_DEBOUNCE_BASE_ADDR + i, 1);
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}
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}
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}
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else {
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else // chip == P3_ROC_CHIP_ID)
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{
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rc = RequestData(P_ROC_BUS_SWITCH_CTRL_SELECT,
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rc = RequestData(P_ROC_BUS_SWITCH_CTRL_SELECT,
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P_ROC_SWITCH_CTRL_DEBOUNCE_BASE_ADDR + i, 1);
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P3_ROC_SWITCH_CTRL_STATE_BASE_ADDR + i, 1);
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rc = RequestData(P_ROC_BUS_SWITCH_CTRL_SELECT,
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P3_ROC_SWITCH_CTRL_DEBOUNCE_BASE_ADDR + i, 1);
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}
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}
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}
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}
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@@ -1102,6 +1117,7 @@ PRResult PRDevice::VerifyChipID()
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else rc = kPRSuccess;
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else rc = kPRSuccess;
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//std::cout << rc << " words read. \n"
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//std::cout << rc << " words read. \n"
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DEBUG(PRLog(kPRLogError, "FPGA Chip ID: 0x%x\n", buffer[1]));
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DEBUG(PRLog(kPRLogError, "FPGA Chip ID: 0x%x\n", buffer[1]));
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chip_id = buffer[1];
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revision = buffer[2] & 0xffff;
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revision = buffer[2] & 0xffff;
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version = buffer[2] >> 16;
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version = buffer[2] >> 16;
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CalcCombinedVerRevision();
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CalcCombinedVerRevision();
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@@ -147,6 +147,7 @@ protected:
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uint16_t version;
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uint16_t version;
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uint16_t revision;
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uint16_t revision;
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uint32_t chip_id;
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uint32_t combinedVersionRevision;
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uint32_t combinedVersionRevision;
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/**
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/**
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* Calculated combined Version/Revision number.
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* Calculated combined Version/Revision number.
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@@ -154,6 +154,8 @@ const uint32_t P_ROC_JTAG_TDI_MEMORY_BASE_ADDR = 0x800;
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const uint32_t P_ROC_SWITCH_CTRL_STATE_BASE_ADDR = 4;
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const uint32_t P_ROC_SWITCH_CTRL_STATE_BASE_ADDR = 4;
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const uint32_t P_ROC_SWITCH_CTRL_OLD_DEBOUNCE_BASE_ADDR = 11;
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const uint32_t P_ROC_SWITCH_CTRL_OLD_DEBOUNCE_BASE_ADDR = 11;
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const uint32_t P_ROC_SWITCH_CTRL_DEBOUNCE_BASE_ADDR = 12;
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const uint32_t P_ROC_SWITCH_CTRL_DEBOUNCE_BASE_ADDR = 12;
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const uint32_t P3_ROC_SWITCH_CTRL_STATE_BASE_ADDR = 16;
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const uint32_t P3_ROC_SWITCH_CTRL_DEBOUNCE_BASE_ADDR = 32;
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const uint32_t P_ROC_EVENT_TYPE_SWITCH = 0;
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const uint32_t P_ROC_EVENT_TYPE_SWITCH = 0;
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const uint32_t P_ROC_EVENT_TYPE_DMD = 1;
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const uint32_t P_ROC_EVENT_TYPE_DMD = 1;
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