mirror of
https://github.com/preble/libpinproc
synced 2026-02-24 18:25:23 +01:00
288 lines
15 KiB
C
288 lines
15 KiB
C
/*
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* The MIT License
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* Copyright (c) 2009 Gerry Stellenberg, Adam Preble
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef PINPROC_PRHARDWARE_H
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#define PINPROC_PRHARDWARE_H
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#if !defined(__GNUC__) || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) || (__GNUC__ >= 4) // GCC supports "pragma once" correctly since 3.4
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#pragma once
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#endif
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#include <stdint.h>
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#include "pinproc.h"
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#if defined(__WIN32__) || defined(_WIN32)
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#include <windows.h>
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#define PRSleep(milliseconds) Sleep(milliseconds)
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#else
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#define PRSleep(milliseconds) usleep(milliseconds*1000)
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#endif
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const int32_t FTDI_VENDOR_ID = 0x0403;
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const int32_t FTDI_FT245RL_PRODUCT_ID = 0x6001;
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const int32_t FTDI_BUFFER_SIZE = 2048;
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const uint32_t P_ROC_INIT_PATTERN_A = 0x801F1122;
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const uint32_t P_ROC_INIT_PATTERN_B = 0x345678AB;
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const uint32_t P_ROC_CHIP_ID = 0xfeedbeef;
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const uint32_t P_ROC_VER_REV_FIXED_SWITCH_STATE_READS = 0x10013; // 1.19
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const uint32_t P_ROC_AUTO_STERN_DETECT_SHIFT = 8;
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const uint32_t P_ROC_AUTO_STERN_DETECT_MASK = 0x00000100;
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const uint32_t P_ROC_AUTO_STERN_DETECT_VALUE = 0x1;
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const uint32_t P_ROC_MANUAL_STERN_DETECT_SHIFT = 0;
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const uint32_t P_ROC_MANUAL_STERN_DETECT_MASK = 0x00000001;
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const uint32_t P_ROC_MANUAL_STERN_DETECT_VALUE = 0x00000000;
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const uint32_t P_ROC_BOARD_VERSION_SHIFT = 7;
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const uint32_t P_ROC_BOARD_VERSION_MASK = 0x00000080;
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const uint32_t P_ROC_ADDR_MASK = 0x000FFFFF;
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const uint32_t P_ROC_HEADER_LENGTH_MASK = 0x7FF00000;
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const uint32_t P_ROC_COMMAND_MASK = 0x80000000;
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const uint32_t P_ROC_ADDR_SHIFT = 0;
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const uint32_t P_ROC_HEADER_LENGTH_SHIFT = 20;
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const uint32_t P_ROC_COMMAND_SHIFT = 31;
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const uint32_t P_ROC_READ = 0;
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const uint32_t P_ROC_WRITE = 1;
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const uint32_t P_ROC_REQUESTED_DATA = 0;
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const uint32_t P_ROC_UNREQUESTED_DATA = 1;
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const uint32_t P_ROC_REG_ADDR_MASK = 0x0000FFFF;
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const uint32_t P_ROC_MODULE_SELECT_MASK = 0x000F0000;
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const uint32_t P_ROC_REG_ADDR_SHIFT = 0;
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const uint32_t P_ROC_MODULE_SELECT_SHIFT = 16;
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const uint32_t P_ROC_MANAGER_SELECT = 0;
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const uint32_t P_ROC_BUS_JTAG_SELECT = 1;
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const uint32_t P_ROC_BUS_SWITCH_CTRL_SELECT = 2;
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const uint32_t P_ROC_BUS_DRIVER_CTRL_SELECT = 3;
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const uint32_t P_ROC_BUS_STATE_CHANGE_PROC_SELECT = 4;
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const uint32_t P_ROC_BUS_DMD_SELECT = 5;
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const uint32_t P_ROC_BUS_UNASSOCIATED_SELECT = 15;
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const uint32_t P_ROC_REG_CHIP_ID_ADDR = 0;
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const uint32_t P_ROC_REG_VERSION_ADDR = 1;
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const uint32_t P_ROC_REG_WATCHDOG_ADDR = 2;
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const uint32_t P_ROC_REG_DIPSWITCH_ADDR = 3;
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const uint32_t P_ROC_MANAGER_WATCHDOG_EXPIRED_SHIFT = 30;
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const uint32_t P_ROC_MANAGER_WATCHDOG_ENABLE_SHIFT = 14;
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const uint32_t P_ROC_MANAGER_WATCHDOG_RESET_TIME_SHIFT = 0;
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const uint32_t P_ROC_MANAGER_REUSE_DMD_DATA_FOR_AUX_SHIFT = 10;
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const uint32_t P_ROC_MANAGER_INVERT_DIPSWITCH_1_SHIFT = 9;
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const uint32_t P_ROC_JTAG_SHIFT_EXIT_SHIFT = 16;
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const uint32_t P_ROC_JTAG_SHIFT_NUM_BITS_SHIFT = 0;
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const uint32_t P_ROC_JTAG_CMD_CHANGE_STATE = 0;
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const uint32_t P_ROC_JTAG_CMD_SHIFT = 1;
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const uint32_t P_ROC_JTAG_CMD_TRANSITION = 2;
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const uint32_t P_ROC_JTAG_CMD_SET_PORTS = 3;
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const uint32_t P_ROC_JTAG_CMD_START_SHIFT = 31;
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const uint32_t P_ROC_JTAG_CMD_OE_SHIFT = 30;
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const uint32_t P_ROC_JTAG_CMD_CMD_SHIFT = 24;
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const uint32_t P_ROC_JTAG_TRANSITION_TCK_MASK_SHIFT = 6;
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const uint32_t P_ROC_JTAG_TRANSITION_TDO_MASK_SHIFT = 5;
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const uint32_t P_ROC_JTAG_TRANSITION_TMS_MASK_SHIFT = 4;
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const uint32_t P_ROC_JTAG_TRANSITION_TCK_SHIFT = 2;
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const uint32_t P_ROC_JTAG_TRANSITION_TDO_SHIFT = 1;
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const uint32_t P_ROC_JTAG_TRANSITION_TMS_SHIFT = 0;
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const uint32_t P_ROC_JTAG_STATUS_DONE_SHIFT = 31;
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const uint32_t P_ROC_JTAG_STATUS_TDI_SHIFT = 16;
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const uint32_t P_ROC_JTAG_COMMAND_REG_BASE_ADDR = 0x0;
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const uint32_t P_ROC_JTAG_STATUS_REG_BASE_ADDR = 0x1;
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const uint32_t P_ROC_JTAG_TDO_MEMORY_BASE_ADDR = 0x400;
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const uint32_t P_ROC_JTAG_TDI_MEMORY_BASE_ADDR = 0x800;
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const uint32_t P_ROC_SWITCH_CTRL_STATE_BASE_ADDR = 4;
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const uint32_t P_ROC_SWITCH_CTRL_OLD_DEBOUNCE_BASE_ADDR = 11;
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const uint32_t P_ROC_SWITCH_CTRL_DEBOUNCE_BASE_ADDR = 12;
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const uint32_t P_ROC_EVENT_TYPE_SWITCH = 0;
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const uint32_t P_ROC_EVENT_TYPE_DMD = 1;
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const uint32_t P_ROC_EVENT_TYPE_MASK = 0xC00;
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const uint32_t P_ROC_EVENT_TYPE_SHIFT = 10;
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const uint32_t P_ROC_EVENT_SWITCH_NUM_MASK = 0xFF;
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const uint32_t P_ROC_EVENT_SWITCH_STATE_MASK = 0x100;
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const uint32_t P_ROC_EVENT_SWITCH_STATE_SHIFT = 8;
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const uint32_t P_ROC_EVENT_SWITCH_TIMESTAMP_MASK = 0xFFFFF000;
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const uint32_t P_ROC_EVENT_SWITCH_TIMESTAMP_SHIFT = 12;
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const uint32_t P_ROC_EVENT_SWITCH_DEBOUNCED_MASK = 0x200;
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const uint32_t P_ROC_EVENT_SWITCH_DEBOUNCED_SHIFT = 9;
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const uint32_t P_ROC_DRIVER_CTRL_DECODE_SHIFT = 10;
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const uint32_t P_ROC_DRIVER_CTRL_REG_DECODE = 0;
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const uint32_t P_ROC_DRIVER_CONFIG_TABLE_DECODE = 1;
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const uint32_t P_ROC_DRIVER_AUX_MEM_DECODE = 2;
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const uint32_t P_ROC_DRIVER_CATCHALL_DECODE = 3;
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const uint32_t P_ROC_DRIVER_GLOBAL_ENABLE_DIRECT_OUTPUTS_SHIFT = 31;
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const uint32_t P_ROC_DRIVER_GLOBAL_GLOBAL_POLARITY_SHIFT = 30;
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const uint32_t P_ROC_DRIVER_GLOBAL_USE_CLEAR_SHIFT = 28;
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const uint32_t P_ROC_DRIVER_GLOBAL_STROBE_START_SELECT_SHIFT = 27;
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const uint32_t P_ROC_DRIVER_GLOBAL_START_STROBE_TIME_SHIFT = 20;
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const uint32_t P_ROC_DRIVER_GLOBAL_START_STROBE_TIME_MASK = 0x07F00000;
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const uint32_t P_ROC_DRIVER_GLOBAL_MATRIX_ROW_ENABLE_INDEX_1_SHIFT = 16;
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const uint32_t P_ROC_DRIVER_GLOBAL_MATRIX_ROW_ENABLE_INDEX_1_MASK = 0x000F0000;
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const uint32_t P_ROC_DRIVER_GLOBAL_MATRIX_ROW_ENABLE_INDEX_0_SHIFT = 12;
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const uint32_t P_ROC_DRIVER_GLOBAL_MATRIX_ROW_ENABLE_INDEX_0_MASK = 0x0000F000;
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const uint32_t P_ROC_DRIVER_GLOBAL_ACTIVE_LOW_MATRIX_ROWS_SHIFT = 11;
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const uint32_t P_ROC_DRIVER_GLOBAL_ENCODE_ENABLES_SHIFT = 10;
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const uint32_t P_ROC_DRIVER_GLOBAL_TICKLE_WATCHDOG_SHIFT = 9;
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const uint32_t P_ROC_DRIVER_GROUP_SLOW_TIME_SHIFT = 12;
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const uint32_t P_ROC_DRIVER_GROUP_DISABLE_STROBE_AFTER_SHIFT = 11;
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const uint32_t P_ROC_DRIVER_GROUP_ENABLE_INDEX_SHIFT = 7;
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const uint32_t P_ROC_DRIVER_GROUP_ROW_ACTIVATE_INDEX_SHIFT = 4;
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const uint32_t P_ROC_DRIVER_GROUP_ROW_ENABLE_SELECT_SHIFT = 3;
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const uint32_t P_ROC_DRIVER_GROUP_MATRIXED_SHIFT = 2;
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const uint32_t P_ROC_DRIVER_GROUP_POLARITY_SHIFT = 1;
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const uint32_t P_ROC_DRIVER_GROUP_ACTIVE_SHIFT = 0;
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const uint32_t P_ROC_DRIVER_CONFIG_OUTPUT_DRIVE_TIME_SHIFT = 0;
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const uint32_t P_ROC_DRIVER_CONFIG_POLARITY_SHIFT = 8;
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const uint32_t P_ROC_DRIVER_CONFIG_STATE_SHIFT = 9;
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const uint32_t P_ROC_DRIVER_CONFIG_UPDATE_SHIFT = 10;
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const uint32_t P_ROC_DRIVER_CONFIG_WAIT_4_1ST_SLOT_SHIFT = 11;
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const uint32_t P_ROC_DRIVER_CONFIG_TIMESLOT_SHIFT = 16;
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const uint32_t P_ROC_DRIVER_CONFIG_PATTER_ON_TIME_SHIFT = 16;
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const uint32_t P_ROC_DRIVER_CONFIG_PATTER_OFF_TIME_SHIFT = 23;
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const uint32_t P_ROC_DRIVER_CONFIG_PATTER_ENABLE_SHIFT = 30;
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const uint32_t P_ROC_DRIVER_CONFIG_FUTURE_ENABLE_SHIFT = 31;
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const uint32_t P_ROC_DRIVER_CONFIG_TABLE_DRIVER_NUM_SHIFT = 1;
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const uint32_t P_ROC_DRIVER_AUX_ENTRY_ACTIVE_SHIFT = 31;
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const uint32_t P_ROC_DRIVER_AUX_OUTPUT_DELAY_SHIFT = 20;
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const uint32_t P_ROC_DRIVER_AUX_OUTPUT_DELAY_MASK = 0x7ff;
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const uint32_t P_ROC_DRIVER_AUX_MUX_ENABLES_SHIFT = 19;
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const uint32_t P_ROC_DRIVER_AUX_COMMAND_SHIFT = 16;
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const uint32_t P_ROC_DRIVER_AUX_COMMAND_MASK = 0x3;
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const uint32_t P_ROC_DRIVER_AUX_ENABLES_SHIFT = 12;
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const uint32_t P_ROC_DRIVER_AUX_ENABLES_MASK = 0xF;
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const uint32_t P_ROC_DRIVER_AUX_EXTRA_DATA_SHIFT = 8;
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const uint32_t P_ROC_DRIVER_AUX_EXTRA_DATA_MASK = 0xF;
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const uint32_t P_ROC_DRIVER_AUX_DATA_SHIFT = 0;
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const uint32_t P_ROC_DRIVER_AUX_DATA_MASK = 0xFF;
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const uint32_t P_ROC_DRIVER_AUX_DELAY_TIME_SHIFT = 0;
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const uint32_t P_ROC_DRIVER_AUX_DELAY_TIME_MASK = 0x3FFF;
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const uint32_t P_ROC_DRIVER_AUX_JUMP_ADDR_SHIFT = 0;
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const uint32_t P_ROC_DRIVER_AUX_JUMP_ADDR_MASK = 0xFF;
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const uint32_t P_ROC_DRIVER_AUX_CMD_OUTPUT = 2;
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const uint32_t P_ROC_DRIVER_AUX_CMD_DELAY = 1;
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const uint32_t P_ROC_DRIVER_AUX_CMD_JUMP = 0;
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const uint32_t P_ROC_SWITCH_CONFIG_CLEAR_SHIFT = 31;
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const uint32_t P_ROC_SWITCH_CONFIG_USE_COLUMN_9 = 30;
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const uint32_t P_ROC_SWITCH_CONFIG_USE_COLUMN_8 = 29;
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const uint32_t P_ROC_SWITCH_CONFIG_MS_PER_DM_SCAN_LOOP_SHIFT = 24;
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const uint32_t P_ROC_SWITCH_CONFIG_PULSES_BEFORE_CHECKING_RX_SHIFT = 18;
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const uint32_t P_ROC_SWITCH_CONFIG_INACTIVE_PULSES_AFTER_BURST_SHIFT = 12;
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const uint32_t P_ROC_SWITCH_CONFIG_PULSES_PER_BURST_SHIFT = 6;
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const uint32_t P_ROC_SWITCH_CONFIG_MS_PER_PULSE_HALF_PERIOD_SHIFT = 0;
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const uint32_t P_ROC_SWITCH_RULE_DRIVE_OUTPUTS_NOW = 13;
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const uint32_t P_ROC_SWITCH_RULE_NUM_DEBOUNCE_SHIFT = 9;
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const uint32_t P_ROC_SWITCH_RULE_NUM_STATE_SHIFT = 8;
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const uint32_t P_ROC_SWITCH_RULE_NUM_SWITCH_NUM_SHIFT = 0;
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const uint32_t P_ROC_SWITCH_RULE_NUM_TO_ADDR_SHIFT = 2;
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const uint32_t P_ROC_SWITCH_RULE_RELOAD_ACTIVE_SHIFT = 31;
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const uint32_t P_ROC_SWITCH_RULE_NOTIFY_HOST_SHIFT = 23;
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const uint32_t P_ROC_SWITCH_RULE_LINK_ACTIVE_SHIFT = 10;
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const uint32_t P_ROC_SWITCH_RULE_LINK_ADDRESS_SHIFT = 11;
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const uint32_t P_ROC_SWITCH_RULE_CHANGE_OUTPUT_SHIFT = 9;
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const uint32_t P_ROC_SWITCH_RULE_DRIVER_NUM_SHIFT = 0;
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const uint32_t P_ROC_STATE_CHANGE_CONFIG_ADDR = 0x1000;
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const uint32_t P_ROC_DMD_NUM_COLUMNS_SHIFT = 0;
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const uint32_t P_ROC_DMD_NUM_ROWS_SHIFT = 8;
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const uint32_t P_ROC_DMD_NUM_SUB_FRAMES_SHIFT = 16;
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const uint32_t P_ROC_DMD_NUM_FRAME_BUFFERS_SHIFT = 24;
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const uint32_t P_ROC_DMD_AUTO_INC_WR_POINTER_SHIFT = 29;
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const uint32_t P_ROC_DMD_ENABLE_FRAME_EVENTS_SHIFT = 30;
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const uint32_t P_ROC_DMD_ENABLE_SHIFT = 31;
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const uint32_t P_ROC_DMD_DOTCLK_HALF_PERIOD_SHIFT = 0;
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const uint32_t P_ROC_DMD_DE_HIGH_CYCLES_SHIFT = 6;
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const uint32_t P_ROC_DMD_LATCH_HIGH_CYCLES_SHIFT = 16;
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const uint32_t P_ROC_DMD_RCLK_LOW_CYCLES_SHIFT = 24;
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const uint32_t P_ROC_DMD_DOT_TABLE_BASE_ADDR = 0x1000;
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typedef struct PRSwitchRuleInternal {
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uint8_t switchNum; /**< Number of the physical switch, or for linked driver changes the virtual switch number (224 and up). */
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PREventType eventType; /**< The event type that this rule generates. Determines closed/open, debounced/non-debounced. */
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bool_t reloadActive;
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bool_t notifyHost;
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bool_t changeOutput; /**< True if this switch rule should affect a driver output change. */
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bool_t linkActive; /**< True if this switch rule has additional linked driver updates. */
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uint16_t linkIndex; /**< Switch rule index ({debounce,state,switchNum}) of the linked driver update rule. */
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PRDriverState driver; /**< Driver state change to affect once this rule is triggered. */
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} PRSwitchRuleInternal;
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bool_t IsStern (uint32_t hardware_data);
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uint32_t CreateRegRequestWord( uint32_t select, uint32_t addr, uint32_t num_words);
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uint32_t CreateBurstCommand ( uint32_t select, uint32_t addr, uint32_t num_words);
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int32_t CreateManagerUpdateConfigBurst ( uint32_t * burst, PRManagerConfig *manager_config);
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int32_t CreateDriverUpdateGlobalConfigBurst ( uint32_t * burst, PRDriverGlobalConfig *driver_globals);
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int32_t CreateDriverUpdateGroupConfigBurst ( uint32_t * burst, PRDriverGroupConfig *driver_group);
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int32_t CreateDriverUpdateBurst ( uint32_t * burst, PRDriverState *driver);
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uint32_t CreateDriverAuxCommand ( PRDriverAuxCommand command);
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int32_t CreateWatchdogConfigBurst ( uint32_t * burst, bool_t watchdogExpired,
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bool_t watchdogEnable, uint16_t watchdogResetTime);
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int32_t CreateDMDUpdateConfigBurst ( uint32_t * burst, PRDMDConfig *dmd_config);
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int32_t CreateSwitchUpdateConfigBurst ( uint32_t * burst, PRSwitchConfig *switchConfig);
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int32_t CreateSwitchUpdateRulesBurst ( uint32_t * burst, PRSwitchRuleInternal *rule_record, bool_t drive_outputs_now);
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void ParseSwitchRuleIndex(uint16_t index, uint8_t *switchNum, PREventType *eventType);
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int16_t CreateSwitchRuleIndex(uint8_t switchNum, PREventType eventType);
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int32_t CreateSwitchRuleAddr(uint8_t switchNum, PREventType eventType, bool_t drive_outputs_now);
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int32_t CreateJTAGLatchOutputsBurst ( uint32_t * burst, PRJTAGOutputs *jtagOutputs);
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int32_t CreateJTAGForceOutputsBurst ( uint32_t * burst, PRJTAGOutputs *jtagOutputs);
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int32_t CreateJTAGShiftTDODataBurst ( uint32_t * burst, uint16_t numBits, bool_t dataBlockComplete);
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PRResult PRHardwareOpen();
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void PRHardwareClose();
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int PRHardwareRead(uint8_t *buffer, int maxBytes);
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int PRHardwareWrite(uint8_t *buffer, int bytes);
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#endif /* PINPROC_PRHARDWARE_H */
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